Nowadays, a liquid crystal display (LCD) and an organic light-emitting diode (OLED) display device are still mainstream products of flat panel display. In a liquid crystal display and an active matrix OLED display device, thin film transistors (TFTs) are generally used for controlling respective pixel units to achieve image display. Control of pixel units includes control of rows and control of columns. The control of rows is generally achieved by using a gate driving circuit for scanning pixel units row by row, and the gate driving circuit (e.g., a Gate driver On Array (GOA)) has been well developed till now. The control of columns is generally achieved by using a data driving circuit for scanning pixel units column by column, thereby transmitting display data.
A traditional gate driving circuit is composed of a plurality of gate driving units which are cascaded. Each of the gate driving units has a same structure of being composed of four thin film transistors and one capacitor (i.e., a structure of 4T1C). Each of the gate driving units has a same working process, except that an input signal and an output signal thereof are different. The circuit structure of a typical gate driving unit is shown in FIG. 1, and the circuit interfaces of the gate driving unit are shown in FIG. 2. Where, Vclk is a clock signal input terminal, Clock is a clock signal input from the clock signal input terminal, Vss is a low potential signal input terminal, and Output[n−1], Output[n], and Output[n+1] are gate driving signals of row n−1, row n, and row n+1 of pixel units, respectively. The working process of the gate driving unit is as follows. Firstly, the gate driving signal Output[n−1] of the row n−1 becomes a high level pulse signal, to turn on a thin film transistor TFT4 and charge a capacitor Cd, and to cause the gate of a thin film transistor TFT1 to be at a high potential so as to turn on the thin film transistor TFT1 at the same time. Next, the gate driving signal Output[n] of the row n becomes a high level pulse signal in synchronization with the clock signal Clock, to turn on pixel units of the row n. Then, the gate driving signal Output[n+1] of the row n+1 becomes a high level pulse signal, to turn on a thin film transistor TFT2 and a thin film transistor TFT3, thereby the capacitor Cd and the gate driving signal Output[n] of the row n being pulled down by a low potential signal input from the low potential signal input terminal Vss. Thus, the thin film TFT1 is turned off and the gate driving signal Output[n] of the row n is maintained at a low potential, so that the pixel units of the row n are turned off.
Since the above gate driving circuit is composed of n gate driving units, the circuit connection thereof is complicated and an area of the whole gate driving circuit is large. Thus, an area occupied by the gate driving circuit on a substrate is also large, which hinders a display panel to have a small size and a low cost. With development of flat panel display technology, to have a narrow border, to be a thin type, and to have a low cost have been development trends of flat panel display. Especially, simplification of the gate driving circuit and reduction of an area of the gate driving circuit have been very important for a product of small size and high resolution.